\appendix
\chapter{Hardware Specs}
\subsection{NES}
Ricoh 2A03 CPU 1.78MHz \\
Ricoh 2C02 PPU 5.37MHz (NTSC) \\
2kB CPU RAM \\
16kB PPU RAM \\
64kB address space \\
Little endian architecture 

\subsection{Test Computers}
\begin{itemize}
    \item Dual Core 800MHz CPU, 1024MB RAM, GNU/Linux, GHC 6.10.2
    \item Dual Core 1800MHz CPU, 2048MB RAM, GNU/Linux, GHC 6.8.2
\end{itemize}

\chapter{Dictionary}
\begin{itemize}
\item ADT: Abstract Data Type.
\item APU: Audio Processing Unit.
\item ASM: Assembly Language.
\item CHR-ROM: Character ROM.
\item CPU: Central Processing Unit.
\item DMA: Direct Memory Access.
\item GHC: The Glasgow Haskell Compiler.
\item GNU: GNU is Not UNIX.
\item IO: Input/Output.
\item IRQ: Interrupt ReQuest.
\item LSB: Least Significant Byte.
\item MHz: MegaHertz
\item MMC: Memory Mapper Controller
\item MOS: Metal Oxide Semiconductor.
\item MSB: Most Significant Byte.
\item NES: Nintendo Entertainment System.
\item NTSC: National Television System Committee
\item NMI: Non-Maskable Interrupt.
\item OAM: Object Attribute Memory.
\item PAL: Phase Alternating Line.
\item PC: Program Counter.
\item Pixel: Colour information for one spot.
\item PPU: Picture Processing Unit.
\item RAM: Random Access Memory.
\item ROM: Read-Only Memory.
\item SDL: Simple DirectMedia Layer.
\item SPR-RAM: Sprite RAM, also known as SRAM or OAM.
\item Sprite: Tile that is used for moving objects.
\item ST: State Thread.
\item STM: Software Transactional Memory.
\item Tile: 8x8 pixels.
\item VBlank: Vertical Blank.
\item VRAM: PPU RAM.
\end{itemize}

\chapter{Instruction List}
\begin{itemize}
    \item \textbf{ADC:} Add with carry. Adds the contents of memory to the 
            accumulator, and if carry is set, it adds 1 to that result, otherwise 0. Flags affected: Z,C,N,V.
    \item \textbf{AND:} Logical and between memory and accumulator. 
            Result is stored in accumulator. Flags affected: Z,N.
    \item \textbf{ASL:} Arithmetic shift left on memory. The contents of bit 7 
            in the memory operand is set to carry. Bit 0 is cleared. 
            Flags affected: Z,C,N
    \item \textbf{ASLA:} Arithmetic shift left on accumulator. Like ASL but on accumulator.
    \item \textbf{BCC:} Branch on carry clear. Branches if C flag is 0.
    \item \textbf{BCS:} Branch on carry set. Branches if C flag is 1.
    \item \textbf{BEQ:} Branch if equal. Branches if Z flag is 1.
    \item \textbf{BIT:} Test bit, does and between accumulator and memory, 
            V is set to bit 6 in memory, N is set to bit 7 in memory. Z is set 
            if the result of the and was 0.
    \item \textbf{BMI:} Branch on minus. Branches if N flag is 1.
    \item \textbf{BNE:} Branch if not equal. Branches if Z flag is 0.
    \item \textbf{BPL:} Branch on plus. Branches if N flag is 0.
    \item \textbf{BRK:} Software Interrupt. PC+1 is pushed onto the stack. 
            B flag is set to 1, status register is pushed onto stack, 
            I flag is set to 1, interrupt vector is loaded to PC.
    \item \textbf{BVC:} Branch if overflow clear. Branches if V flag is 0.
    \item \textbf{BVS:} Branch if overflow. Branches if V flag is 1.
    \item \textbf{CLC:} Clear carry flag, set C to 0.
    \item \textbf{CLI:} Clear interrupt disable flag, set I to 0.
    \item \textbf{CLV:} Clear overflow flag, set V to 0.
    \item \textbf{CMP:} Compare accumulator with memory. If accumulator-memory 
            is 0, Z flag is set. If the result is negative, N flag is set. 
            If the accumulator value is bigger or equal that memory, C flag is set.
    \item \textbf{CPX:} Compare X with memory. Like CMP but on X register.
    \item \textbf{CPY:} Compare Y with memory. Like CMP but on Y register.
    \item \textbf{DEC:} Decrement memory. Affected flags: Z,N.
    \item \textbf{DEX:} Decrement X. Affected flags: Z,N.
    \item \textbf{DEY:} Decrement Y. Affected flags: Z,N.
    \item \textbf{EOR:} XOR between memory and accumulator. Affected flags: Z,N.
    \item \textbf{INC:} Increment memory. Affected flags: Z,N.
    \item \textbf{INX:} Increment X. Affected flags: Z,N.
    \item \textbf{INY:} Increment Y. Affected flags: Z,N.
    \item \textbf{JMP:} Jump to address. No affected flags.
    \item \textbf{JSR:} Jump to subroutine. No affected flags.
    \item \textbf{LDA:} Load accumulator from memory. Affected Flags: Z,N.
    \item \textbf{LDX:} Load X reguster from memory. Affected flags: Z,N.
    \item \textbf{LDY:} Load Y register from memory. Affected flags: Z,N.
    \item \textbf{LSR:} Logical shift right. C is set to bit 0 of memory. 
            Memory bit 7 is cleared, and the memory is shifted one step to the right.
    \item \textbf{LSRA:} Like LSR but on accumulator.
    \item \textbf{NOP:} Does nothing.
    \item \textbf{ORA:} Logical or between memory and accumulator. Affected flags: Z,N.
    \item \textbf{PHA:} Push accumulator to stack. No affected flags.
    \item \textbf{PHP:} Push status register to stack. No affected flags.
    \item \textbf{PLA:} Pull accumulator from stack. Affected flags: Z,N.
    \item \textbf{PLP:} Pull status register from stack. Affected flags: Z,N.
    \item \textbf{ROLA:} Rotate accumulator left with carry. Carry flag is set 
            to bit 7 of accumulator, and bit 0 in accumulator is set to old carry flag.
    \item \textbf{ROL:} Like ROLA but with memory.
    \item \textbf{RORA:} Rotate accumulator right with carry. Carry flag is set 
            to bit 0 of accumulator, and bit 7 in accumulator is set to old carry flag.
    \item \textbf{ROR:} Like RORA but with memory.
    \item \textbf{RTI:} Return from interrupt. Pulls status register and PC register from stack.
    \item \textbf{RTS:} Return from subroutine. Pull PC from stack.
    \item \textbf{SBC:} Subtract with carry. Accumulator is subtracted with memory 
            and (1-C). Affected flags: Z,C,N,V.
    \item \textbf{SEC:} Set carry flag, C is set to 1
    \item \textbf{SED:} Set decimal mode flag (has no effect on computations). D is set to 1.
    \item \textbf{SEI:} Set interrupt disable flag. I is set to 1.
    \item \textbf{STA:} Store accumulator to memory. No affected flags.
    \item \textbf{STX:} Store X register to memory. No affected flags.
    \item \textbf{STY:} Store Y register to memory. No affected flags:.
    \item \textbf{TAX:} Transfer A to X. Affected flags: Z,N.
    \item \textbf{TAY:} Transfer A to Y. Affected flags: Z,N.
    \item \textbf{TSX:} Transfer stack pointer to X. Affected flags: Z,N.
    \item \textbf{TXA:} Transfer X to accumulator. Affected flags: Z,N.
    \item \textbf{TXS:} Transfer X to stack pointer. Affected flags: Z,N.
    \item \textbf{TYA:} Transfer Y to accumulator. Affected flags: Z,N.
\end{itemize}

\chapter{Module Hierarchy}
\begin{center}
    \includegraphics[width=\textwidth]{images/hierarchy.png}
\end{center}

\chapter{Contribution Report}
Being only three people in the group has made it hard to divide the work, so all
of us have been involved in every part of the project. However, we have had 
different responsibilities, stated below: \\

\textbf{David} has been the project leader and has been coordinating the work. He has also
been responsible for the CPU part in this report, and has together with Tobias V
done most work on the PPU.

\textbf{Tobias V} has been web admin, and has been responsible for the wiki. Furthermore
he has together with David been responsible for the PPU. He has also been the one
making the most research, and was responsible for the technical background in this
report. 

\textbf{Tobias O} has been the secretary of the project. He has also been responsible
for the CPU and SDL code, and for the discussion and appendicies of this report.
